Connect NOT gates in a chain and feed the final output back to the first input to form a ring. In this simulation, an odd number keeps switching while an even number settles to a stable state.

A simulation comparing signal changes with different numbers of NOT gates

A red outline marks the gate that will switch next. The waveform below shows the signal at n0.

An odd number of NOT gates keeps the signal changing

A NOT gate outputs 1 for an input of 0 and 0 for an input of 1. After an odd number of inversions, the returning signal is the opposite of its starting value. Each gate responds in turn, and the change travels around the loop repeatedly, producing oscillation.

After an even number of inversions, the signal returns with its original value. Once every gate's output is the inverse of its input, the circuit can hold that state. Two cross-coupled inverters can store one bit, which is the basic storage principle of an SRAM cell.

Gate count and propagation delay determine frequency

Real gates do not switch instantly. The time from an input change to its output response is propagation delay. Assuming identical gate delays, a full 0→1→0 period takes two trips around the loop. Here N is the gate count and t_pd is the delay of one gate.

f = 1 / (2 · N · t_pd); Example: t_pd = 10 ns, N = 5 → 10 MHz

More gates or greater load capacitance increases the period and lowers the frequency. Limiting inverter current also slows transitions. Controlling this delay with a voltage produces a voltage-controlled oscillator (VCO), a component used in PLLs.

Ring-oscillator delay varies with temperature and supply voltage. For a more stable reference frequency, crystal oscillators use the mechanical resonance of a quartz crystal.