Digital Logic

Half Adders and Full Adders

A half adder adds two bits. A full adder also includes the carry-in (Cin) from the previous position. This circuit builds a full adder from two half adders and an OR gate.

A full adder built from two half adders and an OR gate

Full adder using two half adders Half adder 1 adds A and B to produce S1 and C1. Half adder 2 adds Cin and S1 to produce Sum and C2. OR combines C1 and C2 into Cout. Cin=0 A=0 B=0 A B S CO Half adder 1 0 + 0 = 0 A B S CO Half adder 2 0 + 0 = 0 S1=0 C1=0 C2=0 Sum=0 OR Cout=0
Step 1 · Half adder 1 (A + B)
Step 2 · Half adder 2 (S1 + Cin)
Result · Cout Sum
ABCinS1C1C2SumCoutDecimal

Press A, B, and Cin to toggle each input between 0 and 1. Wires carrying 1 turn orange, and the matching truth-table row is highlighted.

A half adder calculates a sum bit and carry bit

Adding two 1-bit inputs gives 0+0=00, 0+1=01, 1+0=01, or 1+1=10 in binary. The low bit S is 1 only when the inputs differ, so it uses XOR. Carry C is 1 only when both inputs are 1, so it uses AND.

S = A ⊕ B
C = A · B

A half adder cannot accept a carry from a lower position. It can be used at the least significant position of a wider adder when no carry-in is needed.

A full adder includes the incoming carry

A full adder adds A, B, and Cin, all representing the same bit position. Half adder 1 first computes S1 and C1 from A and B. Half adder 2 then combines S1 and Cin to produce Sum and C2.

A carry from either stage must pass to the next position, so Cout = C1 OR C2. When C1 is 1, S1 is 0, so C2 cannot be 1. Both carries can never be 1 simultaneously.

A and B inside each half-adder block name its local input pins. In half adder 2, the A pin receives Cin and the B pin receives S1 from half adder 1.